1. Field of the Invention
The present invention relates to an audio signal data processing system.
2. Description of Background Information
There are known audio signal data processing systems capable of controlling the sound field by which a concert-hall (or theater) acoustics with reverberation sounds and the presence, for example, are created in a listening room or in an automobile. An example of the audio data processing system is disclosed in Japanese Patent Application Laid Open No. 64-72615. In such audio signal processing systems, a DSP (digital signal processor) is provided for controlling the sound field by digitally processing an audio signal from an audio signal source such as a tuner. The DSP is constructed so that operating processes such as the four rules of arithmetic can be repeatedly performed at high speed.
A plurality of the DSPs may be used simultaneously so that either a cascade processing or a parallel processing is selectively performed. For this type of processing, it has been conventionally necessary to provide a change-over switch outside the DSP, such as the change-over switch 50 shown in FIG. 1. Specifically, an input signal data is supplied to an input port IN of a first DSP 51 and one of two stationary contacts of the change-over switch 50, and output data from an output port of the first DSP 51 is supplied to a first D/A converter (not shown) and the other stationary contact of the change-over switch 50. Data selected by the changeover switch 50 is supplied to an input port IN of a second DSP 52, and output data of the second DSP 52 is supplied to a second D/A converter (not shown) through its output port OUT. With this structure, when the change-over switch 50 is switched over to select the output data of the first DSP 51, the cascade processing is performed. When on the other hand, the change-over switch is switched over to select the input signal data, the parallel processing is performed.
As described above, for selectively performing the cascade processing and the parallel processing, there conventionally have been a necessity of providing a change-over switch and also a problem that the circuit construction becomes complicated for dealing with a time error generated between signal data respectively issued from each DSP in the case of the cascade processing. This is because timing signals must be separately prepared for the digital to analog conversion of each signal data in order to eliminate the time error.
The DSPs are normally provided with multiplying means for multiplying coefficient data to the audio signal data. The audio signal data is stored in a data memory, and the audio signal is read-out in accordance with a predetermined program, and supplied to the multiplying means. The coefficient data, on the other hand, is stored in a coefficient memory, and sequentially read-out from the coefficient memory at executing timings of the above-described program, and in turn supplied to the multiplying means. When the data are supplied, the multiplying means executes multiplying operations according to the supplied data, and product data obtained by the multiplying operations are received by output means including an accumulator when required.
Conventionally, the systems are configured so that, during a period in which the output means does not accept the product data, coefficient data having an initial value (1, for example) is read-out from the coefficient memory. However, when the data supplied from any one of the memories changes, it in turn causes on-off operations of gate circuits constituting the multiplying means. Thus, there has been a problem that the power consumption of the DSP increases during such periods.
Furthermore, the DSP is provided with an accumulator for holding a result of operation of the arithmetic means, and data held in the accumulator is again supplied to the arithmetic means for the next accumulation operation, so that the accumulation operation is performed in the arithmetic means. With this structure, data is transferred in the DSP between memories or from a memory to the arithmetic means in accordance with a predetermined program, so that the arithmetic operation of signal data is repeatedly performed at high speed.
However, with conventional audio signal data processing systems described above, there has been a problem that the number of program steps increases when a complex operating process is to be performed.